GitHub

AXI Bus

One of the key components of a LiteX SoC is the bus system, which is used to connect the various components of the SoC. One of the most popular bus systems used in LiteX SoCs is the Advanced ...
EDN

Connecting Custom Peripherals to AXI Using a BRAM Interface for FPGA Design

In this column, we briefly introduce AXI, we examine why FPGA designers would use AXI, and we present some of the pros and cons associated with using AXI The Advanced eXtensible Interface, or AXI, is ...
IEEE

AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads

Abstract: Data-intensive applications involving irregular memory streams are inefficiently handled by modern processors and memory systems highly optimized for regular, contiguous data. Recent work ...
EDN

Self-timed interconnect solution supports AXI bus protocol

SAN FRANCISCO — EDA and intellectual property (IP) startup Silistix Ltd. has added support for the on-chip AMBA AXI bus protocol to the company's synthesized self-timed interconnect technology, ...
Electronic Design

Understanding FPGA Processor Interconnects

This file type includes high resolution graphics and schematics when applicable. FPGAs are wonderful tools. They consist of a collection of logic cells called lookup tables (LUTs) surrounded by an ...
Design-Reuse

Enabling Rapid Adoption of the AMBA 3 AXI Protocol-based Design with Synopsys DesignWare IP

To successfully develop an AMBAâ„¢ 3 AXIâ„¢ protocol-based design in the shortest amount of time possible requires more than just raw design expertise and individual, piecemeal IP components. It ...