EDN

Low power LDPC decoder created using high level synthesis

HLS methodology allows the hardware design to be completed at a higher level of abstraction such as C/C++ algorithmic description. This provides significant time and cost savings, and paves the way ...
GitHub

deba10106/quantum-ldpc-code-decoder-using-reinforcement-learning-and-graph-neural-network

A specialized Graph Neural Network + Reinforcement Learning (GNN+RL) based decoder for quantum LDPC codes, optimized for lifted and balanced product LDPC codes ...
IEEE

Soft-Decision Decoding for LDPC Code-Based Quantitative Group Testing

Abstract: We consider the problem of identifying defective items in a population with non-adaptive quantitative group testing. For this scenario, Mashauri et al. recently proposed a low-density parity ...
GitHub

LDPC: Software for Decoding Classical and Quantum Codes

LDPC Version 2: A C++ rewrite of the LDPCv1 package for decoding low density parity check checks. Warning, whilst efforts have been made to provide backwards compatability with LDPCv1, the new version ...
Design-Reuse

CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core Available For Licensing and Implementation from Global IP Core

January 9, 2023 - Global IP Core Sales - The new CCSDS AR4JA LDPC Encoder and Decoder FEC IP Core is a configurable design that allows runtime configuration for decoding different code rates (i.e., ...
IEEE

eLDPC: An Elastic and Scalable LDPC-Decoder with Early Termination by Effectively Leveraging High-Level Synthesis

Abstract: Emerging communication and storage embrace Low-Density Parity-Check (LDPC) codes to fully exploit their physical channels. FPGA (Field-Programmable Gate Array) is widely employed to fast ...
Nature

LDPC Decoding Algorithms on Graphics Processing Units

Low-density parity-check (LDPC) codes represent one of the most effective error-correcting schemes available, approaching Shannon’s theoretical limit whilst maintaining a relatively low decoding ...
Total Telecom

AccelerComm’s New Highly Optimised LDPC Decoder in Software for Intel’s FlexRAN Reference Software Will Increase 5G Throughput by up to 3X

AccelerComm, the company supercharging 5G with Optimisation and Latency Reduction IP, today announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The ...
Design-Reuse

Flash Memory LDPC Decoder IP Core Available For Integration From Global IP Core

January 6, 2025 - Global IP Core Sales - In the Sum Product Algorithm (SPA) for LDPC decoding the messages are sent from the check nodes to bit nodes after the SPA steps which are (for one iteration): ...
EDN

LDPC: Another Key Step Toward Shannon

For communication designers, especially those in the networking and wireless field, the Shannon limit can be seen as the Holy Grail. And, since being first defined in ...
New Electronics

AccelerComm develops LDPC Decoder for Intel’s FlexRAN

AccelerComm, the company specialising in optimisation and latency reduction IP, has announced they have developed a highly optimised LDPC software decoder in collaboration with Intel. The solution is ...