Design-Reuse

BittWare and Atomic Rules announce an FPGA-based UDP Offload Engine IP Core for 10/25/50/100 GbE

Hardware-based acceleration dramatically improves throughput and provides a simple path to 50 and 100 GbE. Washington, DC, USA – May 2, 2016 – BittWare, a premier FPGA board supplier for over 25 years ...
Design-Reuse

Enyx Premieres 25G TCP and UDP Offload Engines with Xilinx Virtex UltraScale+ 16nm FPGA on BittWare's XUPP3R PCIe Board

SALT LAKE CITY, Nov. 16, 2016 – Enyx is pleased to announce the 25G version of its enterprise-class TCP/IP, UDP/IP and MAC Intellectual Property (IP) Cores for ...